On board electronic devices safety provided by DICE-based Muller C-elements

被引:6
作者
Danilov, I. A. [1 ]
Gorbunov, M. S. [1 ,2 ]
Shnaider, A. I. [1 ]
Balbekov, A. O. [1 ]
Rogatkin, Y. B. [1 ]
Bobkov, S. G. [1 ,2 ]
机构
[1] Russian Acad Sci, Sci Res Inst Syst Anal, Nakhimovsky Prosp 36-1, Moscow 117218, Russia
[2] Natl Res Nucl Univ, MEPhI Moscow Engn Phys Inst, Kashirskoe Shosse 31, Moscow 115409, Russia
关键词
C-element; Soft error; Single event upset; Dual interlocked cell; Radiation hardening by design; Asynchronous circuits; RADIATION; DESIGN; CHARGE; QDI;
D O I
10.1016/j.actaastro.2018.01.019
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
Space radiation interacting with electronic components of on-board computing or navigation unit can bring to it's malfunction. Using error tolerant electronic components is a key factor ensuring safety of Space missions. The Muller C-element is one of the main part of the asynchronous circuits and also can be found in synchronous ones. Being sequential by its nature, it is vulnerable to single event upsets. We propose three CMOS circuit implementations of a soft error tolerant Muller C-element, whose tolerance is achieved by using of the well-known DICE-principle and is proved by SPICE simulations.
引用
收藏
页码:28 / 32
页数:5
相关论文
共 25 条
[1]   An Analysis of SEU Robustness of C-Element Structures Implemented in Bulk CMOS and SOI Technologies [J].
Al Tarawneh, Z. ;
Russell, G. ;
Yakovlev, A. .
2010 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, 2010, :280-283
[2]   Single Event Upsets in Deep-Submicrometer Technologies Due to Charge Sharing [J].
Amusan, Oluwole A. ;
Massengill, Lloyd W. ;
Baze, Mark P. ;
Sternberg, Andrew L. ;
Witulski, Arthur F. ;
Bhuva, Bharat L. ;
Black, Jeffrey D. .
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2008, 8 (03) :582-589
[3]  
[Anonymous], 1959, P INT S SWITCH
[4]   The role of a space patrol of solar X-ray radiation in the provisioning of the safety of orbital and interplanetary manned space flights [J].
Avakyan, S. V. ;
Kovalenok, V. V. ;
Savinykh, V. P. ;
Ivanchenkov, A. S. ;
Voronin, N. A. ;
Trchounian, A. ;
Baranova, L. A. .
ACTA ASTRONAUTICA, 2015, 109 :194-202
[5]   Upset hardened memory design for submicron CMOS technology [J].
Calin, T ;
Nicolaidis, M ;
Velazco, R .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1996, 43 (06) :2874-2878
[6]  
Danilov I. A., 2016, 2016 16 EUROPEAN C R, P1
[7]  
Danilov I. A, 2010, PROGRAMMA DOPOLNENIE
[8]   SET Tolerance of 65 nm CMOS Majority Voters: A Comparative Study [J].
Danilov, Igor A. ;
Gorbunov, Maxim S. ;
Antonov, Andrey A. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2014, 61 (04) :1597-1602
[9]   Self Synchronous Circuits for Error Robust Operation in Sub-100nm Processes [J].
Devlin, Benjamin ;
Ikeda, Makoto ;
Asada, Kunihiro .
2012 18TH IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS (ASYNC), 2012, :150-157
[10]   ASYNCHRONOUS DESIGN METHODOLOGIES - AN OVERVIEW [J].
HAUCK, S .
PROCEEDINGS OF THE IEEE, 1995, 83 (01) :69-93