Proposal and design of a new SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI for VLSI applications

被引:5
作者
Kumar, MJ [1 ]
Rao, DV [1 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, New Delhi 110016, India
来源
IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS | 2004年 / 151卷 / 01期
关键词
D O I
10.1049/ip-cds:20040196
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A novel bipolar transistor structure, namely, a SiC emitter lateral NPM Schottky collector bipolar transistor (SCBT) with a silicon-on-insulator (Sol) substrate is explored using two-dimensional (2-D) simulation. A comprehensive comparison of the proposed structure with its equivalent Si lateral NPN BJT and an SiC emitter lateral NPN HBT is presented. Based on simulation results, the authors demonstrate for the first time that the proposed SiC emitter lateral NPM transistor shows superior performance in terms of high current gain and cut-off frequency, reduced collector resistance, negligible reverse recovery time and suppressed Kirk effect over its equivalent Si lateral NPN BJT and SiC emitter lateral NPN HBT. A simple fabrication process compatible with BiCMOS technology is also discussed.
引用
收藏
页码:63 / 67
页数:5
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