Phase Change Memory Line Concept for Embedded Memory Applications

被引：0

作者：

Attenborough, K. ^{[1
]}

Hurkx, G. A. M. ^{[1
]}

Delhougne, R. ^{[1
]}

Perez, J. ^{[1
]}

Wang, M. T. ^{[2
]}

Ong, T. C. ^{[2
]}

Tran, Luan ^{[2
]}

Roy, D. ^{[3
]}

Gravesteijn, D. J. ^{[1
]}

van Duuren, M. J. ^{[1
]}

机构：

[1] NXP TSMC Res Ctr, Kapeldreef 75, B-3001 Louvain, Belgium

[2] TSMC, Tainan, Taiwan

[3] NXP TSMC Res Ctr, Eindhoven, Netherlands

来源：

2010 INTERNATIONAL ELECTRON DEVICES MEETING - TECHNICAL DIGEST | 2010年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We report on successful array level integration of a Phase Change Random Access Memory (PCRAM) with a narrow line of doped-Sb2Te phase change material, embedded in a standard 65nm CMOS process. Demonstrator cells can be reversibly reprogrammed between two well-defined resistance levels and correlate well with data achieved on megabit array level. The low process complexity, standard back-end temperature budget and ease of integration combined with the low voltage and current operation makes this line concept highly suitable for embedded PCRAM applications.

引用

页数：4

共 4 条

[1] Annunziata R, 2009, IEDM, P1
[2] [Anonymous], 2006, S VLSI TECHNOL DIG T
[3] Evidence of the thermo-electric Thomson effect and influence on the program conditions and cell optimization in phase-change memory cells
Castro, D. Tio
Goux, L.
Hurkx, G. A. M.
Attenborough, K.
Delhougne, R.
Lisoni, J.
Jedema, F. J.
Zandt, M. A. A. In't
Wolters, R. A. M.
Gravesteijn, D. J.
Verheijen, M. A.
Kaiser, M.
Weemaes, R. G. R.
Wouters, D. J.
[J]. 2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2, 2007, : 315 - +
[4] Cho SL, 2005, 2005 Symposium on VLSI Technology, Digest of Technical Papers, P96

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