A low-jitter and precise multiphase delay-locked loop using shifted averaging VCDL

被引：0
|
作者：
Chang, HH [1 ]
Sun, CH [1 ]
Liu, SI [1 ]
机构：
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10764, Taiwan
来源：
2003 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE: DIGEST OF TECHNICAL PAPERS | 2003年 / 46卷
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
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页码：434 / +
页数：3
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