Construction of VHDL-AMS simulator in Matlab™

被引：0

作者：

Zorzi, M ^{[1
]}

Franzè, F ^{[1
]}

Speciale, N ^{[1
]}

机构：

[1] Univ Bologna, DEIS, I-40136 Bologna, Italy

来源：

BMAS 2003: PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL WORKSHOP ON BEHAVIORAL MODELING AND SIMULATION | 2003年

关键词：

VHDL-AMS; CAD tool; circuit simulation; Delta-Sigma ADC; behavioral modeling;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper we describe the digital kernel implementation of the simulator S.A.M.S.A.[1], a tool for the simulation of Vhdl-Ams systems in Matlab(TM). The digital kernel was validated toy simulating different systems. In particular we will show the simulation of a low-power multistage decimator for a wideband Delta-Sigma Analog to Digital Converter (ADC). This example was correctly simulated given the same results as other VHDL commercial tools.

引用

页码：113 / 117

页数：5

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