Analysis of Middle Frequency Resonance in DFIG System Considering Phase-Locked Loop

被引：53

作者：

Song, Yipeng ^{[1
]}

Blaabjerg, Frede ^{[1
]}

机构：

[1] Aalborg Univ, Dept Energy Technol, DK-9220 Aalborg, Denmark

来源：

IEEE TRANSACTIONS ON POWER ELECTRONICS | 2018年 / 33卷 / 01期

关键词：

Controller parameters; doubly fed induction generator (DFIG) system; middle frequency resonance (MFR); phase-locked loop (PLL); parallel-compensated weak network; GRID-CONNECTED INVERTER; SSR ANALYSIS; WIND; ROBUSTNESS; GENERATORS;

D O I：

10.1109/TPEL.2017.2672867

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

As the wind power technology develops, the doubly fed induction generator (DFIG) based wind power system, when connected to a weak network with large impedance, may suffer resonances, i.e., subsynchronous resonance or high-frequency resonance when connected to the series-or parallel-weak network. Besides these two resonances, a middle frequency resonance (MFR) between 200 and 800 Hz may appear when the phase-locked loop (PLL) with fast control dynamics is applied. In order to analyze the MFR, the DFIG system impedance considering the PLL is studied based on the vector-oriented control strategy in rotor-side converter and grid-side converter. On the basis of the established impedance modeling of the DFIG system, it is found that the PLL with fast control dynamics may result in the occurrence of MFR due to a decreasing phase margin. The simulation results of both a 7.5 kW small-scale DFIG system and a 2 MW large-scale DFIG system are provided to validate the theoretical analysis of the MFR.

引用

页码：343 / 356

页数：14

共 50 条

[41] Measurement of The Phase-Transfer Function of The Software Phase-Locked Loop
Bondariev, A. P.
Altunin, S. I.
2017 SECOND INTERNATIONAL CONFERENCE ON INFORMATION AND TELECOMMUNICATION TECHNOLOGIES AND RADIO ELECTRONICS (UKRMICO), 2017,
[42] Novel optical phase demodulator based on a sampling phase-locked loop
Zibar, Darko
Johansson, Leif A.
Chou, Hsu-Feng
Ramaswamy, Anand
Rodwell, Mark
Bowers, John E.
IEEE PHOTONICS TECHNOLOGY LETTERS, 2007, 19 (9-12) : 686 - 688
[43] INVERSE PARK TRANSFORMATION USING CORDIC AND PHASE-LOCKED LOOP
Mokhtar, Anis Shahida Niza
Reaz, Mamun Bin Ibne
Marufuzzaman, Mohammad
Ali, Mohammad Alauddin Mohammad
REVUE ROUMAINE DES SCIENCES TECHNIQUES-SERIE ELECTROTECHNIQUE ET ENERGETIQUE, 2012, 57 (04): : 422 - 431
[44] Parallel testing of a phase-locked loop lock time in production
Zhang, Larry
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2008, 57 (09) : 2089 - 2092
[45] A Quasi-Type-1 Phase-Locked Loop Structure
Golestan, Saeed
Freijedo, Francisco D.
Vidal, Ana
Guerrero, Josep M.
Doval-Gandoy, Jesus
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2014, 29 (12) : 6264 - 6270
[46] Phase-Locked Loop Simulations Using the Latency Insertion Method
Schutt-Aine, Jose E.
Goh, Patrick K.
2013 IEEE 4TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS (LASCAS), 2013,
[47] Parameter space analysis of a phase-locked loop voltage-controlled oscillator circuit
Holtzman, M
Johnson, B
Fadali, MS
Lautzenhiser, L
INTERNATIONAL SOCIETY FOR COMPUTERS AND THEIR APPLICATIONS 11TH INTERNATIONAL CONFERENCE ON COMPUTER APPLICATIONS IN INDUSTRY AND ENGINEERING, 1998, : 268 - 271
[48] High Performance CMOS Charge Pumps for Phase-locked Loop
Rahman, Labonnah Farzana
Ariffin, NurHazliza Bt
Reaz, Mamun Bin Ibne
Marufuzzaman, Mohammad
TRANSACTIONS ON ELECTRICAL AND ELECTRONIC MATERIALS, 2015, 16 (05) : 241 - 249
[49] Fault Injection Caused by Phase-Locked Loop Compromised With IEMI
Nishiyama, Hikaru
Fujimoto, Daisuke
Hayashi, Yuichi
IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, 2024,
[50] A Phase-Locked Loop With Injection-Locked Frequency Multiplier in 0.18-μm CMOS for V-Band Applications
Wu, Chung-Yu
Chen, Min-Chiao
Lo, Yi-Kai
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2009, 57 (07) : 1629 - 1636

← 1 2 3 4 5 →