Spatial characterization of process variations via MOS transistor time constants in VLSI and WSI

This paper is the first large-scale experimental characterization of spatial process variations for a parameter that is directly involved in timing issues: the MOS transistor time constant. This is achieved by measuring the oscillation period of highspeed (500 MHz) CMOS ring oscillators that are implemented at different locations on individual dies and over wafers. Novel phenomena are observed, improving our understanding of how process variations affect the performance of synchronous systems, particularly in clock distribution networks. We observed four components contributing to period variations: an environment-dependent component, a process-dependent component of lower spatial frequency, a random component analogous to white noise, and a component depending on the geometry of the power-supply distribution network.