Double-gate CMOS: Symmetrical-versus asymmetrical-gate devices

被引：166

作者：

Kim, K ^{[1
]}

Fossum, JG ^{[1
]}

机构：

[1] Univ Florida, Dept Elect & Comp Engn, Gainesville, FL 32611 USA

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2001年 / 48卷 / 02期

关键词：

CMOS integrated circuits; double-gate MOSFET;

D O I：

10.1109/16.902730

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Numerical device-simulation results, supplemented by analytical characterizations, are presented to argue that asymmetrical double-gate (DG) CMOS, utilizing n(+) and p(+) polysilicon gates, can be superior to symmetrical-gate counterparts for several reasons, only one of which is its previously noted threshold-voltage control. The most noteworthy result is that asymmetrical DG MOSFETs, optimally designed with only one predominant channel, yield comparable, and even higher drive currents at low supply voltages, The simulations further give good physical insight pertaining to the design of DG devices with channel lengths of 50 nm and less.

引用

页码：294 / 299

页数：6

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