A universal low-noise analog receiver baseband in 65-nm CMOS

被引:1
|
作者
Tekin, Ahmet [1 ,2 ]
Elwan, Hassan [1 ]
Pedrotti, Kenneth [2 ]
机构
[1] Newport Media Inc, Lake Forest, CA 92630 USA
[2] Univ Calif Santa Cruz, Dept Elect & Comp Engn, Santa Cruz, CA 95064 USA
关键词
Low-noise receiver; Noise-shaping blocker filtering; Frequency dependent negative resistance (FDNR); Post mixer amplifier (PMA); Variable gain amplifier (VGA); CONTINUOUS-TIME FILTER; MULTISTANDARD; REALIZATION; BLUETOOTH; TUNER;
D O I
10.1007/s10470-010-9483-7
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, a novel universal receiver baseband approach is introduced. The chain includes a post-mixer noise shaping blocker pre-filter, a programmable-gain post mixer amplifier (PMA) with blocker suppression, a differential ramp-based novel linear-in-dB variable gain amplifier and a Sallen-Key output buffer. The 1.2-V chain is implemented in a 65-nm CMOS process, occupying a die area of 0.45 mm(2). The total power consumption of the baseband chain is 11.5 mW. The device can be tuned across a bandwidth of 700-KHz to 5.2-MHz with 20 kHz resolution and is tested for two distinct mobile-TV applications; integrated services digital broadcasting-terrestrial ISDB-T (3-segment f (c) = 700 kHz) and digital video broadcasting-terrestrial/handheld (DVB-T/H f (c) = 3.8 MHz). The measured IIP3 of the whole chain for the adjacent blocker channel is 24.2 and 24 dBm for the ISDB-T and DVB-T/H modes, respectively. The measured input-referred noise density is 10.5 nV/sqrtHz in DVB-T/H mode and 14.5 nV/sqrtHz in ISDB-T mode.
引用
收藏
页码:225 / 238
页数:14
相关论文
共 50 条
  • [1] A universal low-noise analog receiver baseband in 65-nm CMOS
    Ahmet Tekin
    Hassan Elwan
    Kenneth Pedrotti
    Analog Integrated Circuits and Signal Processing, 2010, 65 : 225 - 238
  • [2] A Low-Noise Analog Baseband in 65nm CMOS
    Elwan, Hassan
    Tekin, Ahmet
    Pedrotti, Kenneth
    IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE 2010, 2010,
  • [3] A 54.4-90 GHz Low-Noise Amplifier in 65-nm CMOS
    Yu, Yiming
    Liu, Huihua
    Wu, Yunqiu
    Kang, Kai
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2017, 52 (11) : 2892 - 2904
  • [4] Highly Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 65-nm CMOS
    Wang, Yixiao
    Ye, Le
    Liao, Huailin
    Huang, Ru
    Wang, Yangyuan
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2015, 62 (03) : 296 - 300
  • [5] A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS
    Furuta, Masanori
    Okuni, Hidenori
    Hosoya, Masahiro
    Sai, Akihide
    Matsuno, Junya
    Saigusa, Shigehito
    Itakura, Tetsuro
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2015, E98A (02) : 492 - 499
  • [6] A 53-67 GHz Low-Noise Mixer-First Receiver Front-End in 65-nm CMOS
    Kashani, Milad Haghi
    Tarkeshdouz, Amirahmad
    Afshari, Ehsan
    Mirabbasi, Shahriar
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2019, 66 (06) : 2051 - 2063
  • [7] A 79-GHz Adaptive-Gain and Low-Noise UWB Radar Receiver Front-End in 65-nm CMOS
    Jang, Jingyu
    Oh, Juntaek
    Kim, Choul-Young
    Hong, Songcheol
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2016, 64 (03) : 859 - 867
  • [8] A low power, low noise figure quadrature demodulator for a 60 GHz receiver in 65-nm CMOS technology
    Amin, Najam Muhammad
    Wang Zhigong
    Li Zhiqun
    Li Qin
    Liu Yang
    JOURNAL OF SEMICONDUCTORS, 2015, 36 (04)
  • [9] A K-Band Variable Gain Low-Noise Amplifier with Low Phase Variation in 65-nm CMOS
    Cheng, Depeng
    Li, Lianming
    Xie, Min
    Wu, Xu
    He, Long
    Sheng, Bin
    2021 IEEE MTT-S INTERNATIONAL WIRELESS SYMPOSIUM (IWS 2021), 2021,
  • [10] A Digital Baseband for Low Power FSK Based Receiver in 65 nm CMOS
    Sherazi, S. M. Yasser
    Sjoland, Henrik
    Nilsson, Peter
    2014 21ST IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (ICECS), 2014, : 159 - 162