Output Admittance Synthesizer for Synchronverters

被引：4

作者：

Busada, Claudio A. ^{[1
,2
]}

Jorge, Sebastian Gomez ^{[1
,2
]}

Solsona, Jorge A. ^{[1
,2
]}

机构：

[1] Univ Nacl Sur UNS, CONICET, Inst Invest Ingn Elect IIIE, RA-8000 Bahia Blanca, Buenos Aires, Argentina

[2] Dept Ing Elect & Comp, RA-8000 Bahia Blanca, Buenos Aires, Argentina

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2022年 / 69卷 / 05期

关键词：

Microgrid; output impedance; power electronics; synchronverter (SV); virtual impedance; RESONANT CURRENT CONTROLLER; INVERTERS; CONVERTERS;

D O I：

10.1109/TIE.2021.3082069

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This article proposes an "output admittance synthesizer" (OAS), a feedback block that enables the synchronverter (SV) to have specific values of output admittance (modulus and phase), at specified harmonic frequencies (and sequences) of the fundamental frequency of the grid voltage (including +/- 1). The sequence discrimination enables the SV to have two different admittances at each frequency: A positive sequence and a negative sequence admittance. This feature is of interest for both treating harmonics and imbalance of the voltage at the point of common coupling. Additionally, using the OAS allows to place the closed loop poles of the resulting feedback system at arbitrary locations.

引用

页码：4320 / 4328

页数：9

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