Setup and Performance of a Combined Hardware-in-loop and Software-in-loop Test for MMC-HVDC Control and Protection System

被引:0
|
作者
Lin, Chang [1 ]
Liu, Dong [1 ]
Wu, Xueguang [1 ]
ZhiyuanHe [1 ]
Wang, Weihua [2 ]
Li, Wei [2 ]
机构
[1] State Grid Smart Grid Res Inst, SGCC, Beijing, Peoples R China
[2] Opal RT Technol Inc, Montreal, PQ, Canada
来源
2015 9TH INTERNATIONAL CONFERENCE ON POWER ELECTRONICS AND ECCE ASIA (ICPE-ECCE ASIA) | 2015年
关键词
VSC-HVDC; MMC; Hardware-in-the-loop (HIL); software-in-the-loop (SIL);
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Despite the rapid development of VSC-HVDC technology, the practical experience to operate modular multi-level converter(MMC) has not yet been sufficiently accumulated. Real-time simulation is one of the most efficient approaches to verify the control and protection(C & P) scheme under various contingencies. With the increasing number of sub-modules, the accurate simulation of the MMC-HVDC becomes more difficult, as it requires larger computing resources and more complex interface between the test platform and the C&P system hardware devices. This paper proposes an application of real-time simulation, which combines the hardware-in-loop(HIL) and software-in-loop(SIL) approach to test a control and protection system for MMC-based HVDC links. In the proposed system, a pole control and protection(PCP) will be tested using the HIL approach, while the valve base controller(VBC) is tested using the SIL method. The setup of the test rig and performance is demonstrated in this paper.
引用
收藏
页码:1333 / 1338
页数:6
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