Sigma-delta modulator with spectrally shaped feedback

被引:63
作者
Oliaei, O [1 ]
机构
[1] Motorola Labs, Schaumburg, IL 60196 USA
关键词
ADC; analog finite-impulse response (FIR) filter; continuous-time modulator; jitter; oversampling data converter; sigma-delta modulation; switched-capacitor; timing uncertainty;
D O I
10.1109/TCSII.2003.815023
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper explores the use of finite-impulse response (FIR) filters in the feedback path of a low-pass sigma-delta modulator in order to combat some nonideal effects encountered in an analog implementation. In this approach, the filter corresponding to the first integrator is a lowpass filter which smoothes out the feedback waveform by attenuating the high-frequency quantization noise. This lowpass filtering decreases the power consumption of a switched-capacitor implementation and alternatively reduces the sensitivity to clock jitter in a continuous-time structure. A design methodology ensuring the stability of the system is presented. Theoretical analysis and simulations show that the FIR filters allow a continuous-time single-bit modulator to achieve the jitter performance of a comparable multibit modulator.
引用
收藏
页码:518 / 530
页数:13
相关论文
共 20 条
[1]   Optimized reduced sample rate sigma-delta modulation [J].
Birru, D .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1997, 44 (11) :896-906
[2]   Clock jitter and quantizer metastability in continuous-time delta-sigma modulators [J].
Cherry, JA ;
Snelgrove, WM .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 1999, 46 (06) :661-676
[3]   Multirate ΣΔ modulators [J].
Colodro, F ;
Torralba, A .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 2002, 49 (03) :170-176
[4]  
CUTHBERT TR, 1987, OPTIMIZATION USING P
[5]  
FERGUSON PF, 1990, 1990 IEEE INTERNATIONAL SYMP ON CIRCUITS AND SYSTEMS, VOLS 1-4, P890, DOI 10.1109/ISCAS.1990.112231
[6]   A 3.2-GHZ 2ND-ORDER DELTA-SIGMA MODULATOR IMPLEMENTED IN INP HBT TECHNOLOGY [J].
JENSEN, JF ;
RAGHAVAN, G ;
COSAND, AE ;
WALDEN, RH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1995, 30 (10) :1119-1127
[7]  
Jury E. I., 1964, Theory and Application of the Z-Transform Method
[8]  
KREYZIG E, 1998, ADV ENG MATH
[9]   THE BASIS AND ARCHITECTURE FOR THE REDUCTION OF TONES IN A SIGMA-DELTA DAC [J].
LEDZIUS, RC ;
IRWIN, J .
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1993, 40 (07) :429-439
[10]   A 400-MHz, 12-bit, 18-mW, IF digitizer with mixer inside a sigma-delta modulator loop [J].
Namdar, A ;
Leung, BH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (12) :1765-1776