Input Current Harmonic Reduction based on Space Vector PWM for Three-level Inverter Operating over a Wide Range Power Factor

被引：9

作者：

Nishizawa, Koroku ^{[1
]}

Itoh, Jun-ichi ^{[1
]}

Odaka, Akihiro ^{[2
]}

Toba, Akio ^{[2
]}

Umida, Hidetoshi ^{[2
]}

机构：

[1] Nagaoka Univ Technol, 1603-1 Kamitomioka Machi, Nagaoka, Niigata 9402188, Japan

[2] Fuji Elect Co Ltd, 1 Fuji Machi, Hino, Tokyo 1918502, Japan

来源：

IEEJ JOURNAL OF INDUSTRY APPLICATIONS | 2020年 / 9卷 / 03期

关键词：

three-level voltage source inverter; space vector PWM; input current harmonics; STRATEGY; VSI;

D O I：

10.1541/ieejjia.9.208

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a space vector pulse width modulation (SVPWM) that reduces current harmonics flowing through DC-link capacitors of a three-level voltage source inverter in a three-phase motor drive system. The inverter input current harmonics are minimized by optimizing the applied voltage space vectors to reduce the fluctuation of the inverter input current around its average value. Furthermore, the proposed strategy can be used for a wide range of load power factors by changing the combination of voltage space vectors according to output phase current conditions. It is experimentally shown that the proposed SVPWM reduces the inverter input current harmonics by 27.4% at most, compared with that of the conventional SVPWM. Moreover, the analytical and experimental results clarify that the proposed SVPWM reduces the inverter input current harmonics at any load power factor.

引用

页码：208 / 218

页数：11

共 23 条

[1] Modified SVPWM algorithm for three level VSI with synchronized and symmetrical waveforms [J].