A Real-Time FHD Learning-Based Super-Resolution System Without a Frame Buffer

被引:22
作者
Yang, Ming-Che [1 ,2 ]
Liu, Kuan-Ling [1 ,2 ]
Chien, Shao-Yi [1 ,2 ]
机构
[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 106, Taiwan
[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 106, Taiwan
关键词
Super resolution; anchored neighborhood regression; real-time; FPGA;
D O I
10.1109/TCSII.2017.2749336
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This brief presents a real-time learning-based super-resolution (SR) system without a frame buffer. The system running on an Altera Stratix IV field programmable gate array can achieve output resolution of 1920 x 1080 (FHD) at 60 fps. The proposed architecture performs an anchored neighborhood regression algorithm that generates a high-resolution image from a low-resolution image input using only numbers of line buffers. This real-time system without a frame buffer makes it possible to integrate SR operation into image sensors or display drivers carrying out computational photography and display.
引用
收藏
页码:1407 / 1411
页数:5
相关论文
共 50 条
  • [1] A Real-Time Learning-Based Super-Resolution System on FPGA
    Zha, Daolu
    Jin, Xi
    Shang, Rui
    Yang, Pengfei
    PARALLEL PROCESSING LETTERS, 2020, 30 (04)
  • [2] A Real-Time Learning-Based Super-Resolution System Using Direct Simple Functions
    Zha, Daolu
    Jin, Xi
    Shang, Rui
    Yang, Pengfei
    2018 IEEE 29TH INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS (ASAP), 2018, : 77 - 80
  • [3] Realizing real-time deep learning-based super-resolution applications on Integrated GPUs
    Kim, SungYe
    Bindu, Preeti
    2016 15TH IEEE INTERNATIONAL CONFERENCE ON MACHINE LEARNING AND APPLICATIONS (ICMLA 2016), 2016, : 693 - 696
  • [4] Limitations of Learning-Based Super-Resolution
    Shoji, Hiroki
    Gohshi, Seiichi
    2015 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATION SYSTEMS (ISPACS), 2015, : 646 - 651
  • [5] Winograd-based Real-time Super-Resolution System on FPGA
    Shi, Bizhao
    Tang, Zhucheng
    Luo, Guojie
    Jiang, Ming
    2019 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (ICFPT 2019), 2019, : 423 - 426
  • [6] FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN
    Manabe, Taito
    Shibata, Yuichiro
    Oguri, Kiyoshi
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2018, E101A (12) : 2280 - 2289
  • [7] A Real-Time Super-Resolution Method Based on Convolutional Neural Networks
    Shipeng Fu
    Lu Lu
    Hu Li
    Zhen Li
    Wei Wu
    Anand Paul
    Gwanggil Jeon
    Xiaomin Yang
    Circuits, Systems, and Signal Processing, 2020, 39 : 805 - 817
  • [8] An FPGA-based design for real-time super-resolution reconstruction
    Marin, Yoan
    Miteran, Johel
    Dubois, Julien
    Heyrman, Barthelemy
    Ginhac, Dominique
    JOURNAL OF REAL-TIME IMAGE PROCESSING, 2020, 17 (06) : 1769 - 1785
  • [9] A Real-Time Super-Resolution Method Based on Convolutional Neural Networks
    Fu, Shipeng
    Lu, Lu
    Li, Hu
    Li, Zhen
    Wu, Wei
    Paul, Anand
    Jeon, Gwanggil
    Yang, Xiaomin
    CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2020, 39 (02) : 805 - 817
  • [10] An FPGA-based design for real-time super-resolution reconstruction
    Yoan Marin
    Johel Miteran
    Julien Dubois
    Barthélémy Heyrman
    Dominique Ginhac
    Journal of Real-Time Image Processing, 2020, 17 : 1769 - 1785