Design and verification of supervisory controller of high-speed train

被引：0
|
作者：
Yoo, SP [1 ]
Lee, DY [1 ]
Il Son, H [1 ]
机构：
[1] Korea Adv Inst Sci & Technol, Dept Mech Engn, Yusong Gu, Taejon 305701, South Korea
来源：
ISIE 2001: IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS PROCEEDINGS, VOLS I-III | 2001年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
A high-level controller, supervisory controller, is required to monitor, control, and diagnose the low-level controllers of the high-speed train. The supervisory controller controls low-level controllers by monitoring input and output signals, events, and the high-speed train can be modeled as a discrete event system (DES). The high-speed train is modeled with automata, and the high-level control specification is defined. The supervisory controller is designed using the high-speed train model and the control specification. The designed supervisory controller is verified and evaluated with simulation using a computer-aided software engineering (CASE) tool, ObjectGEODE.
引用
收藏
页码：1290 / 1295
页数：6
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