Efficient high radix modular multiplication for high-speed computing in re-configurable hardware

被引:0
作者
Wang, Y [1 ]
Leiwo, J [1 ]
Srikanthan, T [1 ]
机构
[1] Nanyang Technol Univ, Sch Comp Engn, Singapore 639798, Singapore
来源
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年
关键词
modular multiplication; high radix; FPGA; Montgomery multiplication;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
RSA is one of the most widely used public key cryptosystems, where modular multiplications are the computing intensive kernel of modular exponentiations constitute. An efficient fast modular multiplication algorithm is proposed to notably reduce the overall computation time of the modified Montgomery's algorithm. Simulation results show consistent improvements for a wide range of bit widths and radix k values with approximately 50% reduction in the computation time when compared to existing method. The proposed algorithm was ported to FPGA for bit widths ranging from 128 to 2048. Our results shows, for a bit width of 2048 with k = 1 significant speed-up in the computation can be realized when the proposed technique is ported to FPGA.
引用
收藏
页码:1226 / 1229
页数:4
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