Fault-tolerant, multilevel converter topology for switched reluctance machines

The following paper presents new fault tolerant converter topology for switched reluctance machines, that features multilevel output along with its advantages. The principle of operation in normal as well as in the fault conditions are described. Previously proposed modulation strategy including DC bus voltage balancing scheme is applied and tested in measurements. Low cost, discrete implementation of the NPC asymmetric bridge converter including the measurement results are presented. The measurements prove basic functionality of the new converter topology and at the same time the viability of such a implementation. Furthermore, semiconductor power losses comparison with conventional asymmetric bridge converter is carried out through simulation. The results of power losses analysis show that an converter with multilevel output and inherent fault tolerance does not have to dramatically decrease the overall efficiency. Moreover, power losses distribution show that there is a lot of space for further optimization of the converter. The optimization can be done throughout modifications of the modulation scheme as well as proper component selection.