Behavioral modeling for timing, noise, and signal integrity analysis

被引：0

作者：

Hayes, JD ^{[1
]}

Wissel, L ^{[1
]}

机构：

[1] IBM, Microelect Div, Armonk, NY 10504 USA

来源：

PROCEEDINGS OF THE IEEE 2001 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2001年

关键词：

D O I：

10.1109/CICC.2001.929800

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

I/O behavioral modeling in the form. of IBIS models has gained wide acceptance in signal integrity analysis. While the IBIS model accurately represents the characteristics of the output pin at three fixed process comers, it does not model driver delay or account for variations in temperature, supply voltages, and input transition rate. In this paper, we present a behavioral modeling technique that captures driver delay for timing analysis, driver output characteristics for signal integrity, and pre-drive currents for noise and power grid analysis; all are functions of temperature, supply voltages, and input transition rate.

引用

页码：353 / 356

页数：4