A zero-crossing-based 8-bit 200 MS/s pipelined ADC

Zero-crossing-based circuits (ZCBC) are introduced a generalization of comparator-based switched-capacitor circuits (CBSC). To demonstrate this concept, an 8-bit, 200 MS/s, pipelined ADC is implemented in a 0.18 mu m CMOS technology. A dynamic zero-crossing detector and current source replace the functionality of an opamp to realize a precision charge transfer. Furthermore, current source splitting improves linearity at high speeds and bit decision flip-flops replace traditional bit decision comparators for increased speed. The complete ADC draws no static current and consumes 8.5 mW of power. The corresponding FOM is 0.38.pJ/step at 100 MS/s and 0.51 pJ/step at 200 MS/s.