Graph modeling of parallelism in superscalar architecture - A case study of HP PA-RISC microprocessor

被引：0

作者：

Malek, M ^{[1
]}

Chillakanti, P ^{[1
]}

Shaikh, SA ^{[1
]}

Sinha, A ^{[1
]}

机构：

[1] HUMBOLDT UNIV BERLIN,INST INFORMAT,D-10117 BERLIN,GERMANY

来源：

PROCEEDINGS OF THE IEEE SOUTHEASTCON '96: BRINGING TOGETHER EDUCATION, SCIENCE AND TECHNOLOGY | 1996年

关键词：

D O I：

10.1109/SECON.1996.510149

中图分类号：

TP31 [计算机软件];

学科分类号：

081202 ; 0835 ;

摘要：

引用

页码：641 / 648

页数：4

共 47 条

[1] Four-way superscalar PA-RISC processors
Scott, AP
Burkhart, KP
Kumar, A
Blumberg, RM
Ranson, GL
HEWLETT-PACKARD JOURNAL, 1997, 48 (04): : 8 - 15
[2] HP EMBRACES NEXTSTEP FOR PA-RISC
WAURZYNIAK, P
BYTE, 1993, 18 (09): : 40 - 40
[3] PROVIDING HP-UX KERNEL FUNCTIONALITY ON A NEW PA-RISC ARCHITECTURE
BOLLINGER, DE
LEMMON, FP
YAMINE, DL
HEWLETT-PACKARD JOURNAL, 1992, 43 (03): : 11 - 14
[4] PA-RISC PERFORMANCE MODELING AND SIMULATION
FOWLES, RG
HEWLETT-PACKARD JOURNAL, 1992, 43 (04): : 21 - 21
[5] PA-RISC ARCHITECTURE STARTS A FORAY INTO THE EMBEDDED WORLD
CHILD, J
COMPUTER DESIGN, 1994, 33 (02): : 32 - &
[6] I-DDQ testing of a 180MHz HP PA-RISC microprocessor with redundancy programmed caches
Meneghini, T
Josephson, D
IEEE INTERNATIONAL WORKSHOP ON IDDQ TESTING, DIGEST OF PAPERS, 1997, : 44 - 51
[7] A HIGH-PERFORMANCE NETWORK ARCHITECTURE FOR A PA-RISC WORKSTATION
BANKS, D
PRUDENCE, M
IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, 1993, 11 (02) : 191 - 202
[8] HP发布PA-RISC处理器未来之路
通信世界, 1999, (01) : 20 - 20
[9] DESIGN VERIFICATION OF THE HP-9000 SERIES 700 PA-RISC WORKSTATIONS
AHI, AM
BURROUGHS, GD
GORE, AB
LAMAR, SW
LIN, CYR
WIEMANN, AL
HEWLETT-PACKARD JOURNAL, 1992, 43 (04): : 34 - 42
[10] 64-bit and multimedia extensions in the PA-RISC 2.0 architecture
Lee, R
Huck, J
DIGEST OF PAPERS: COMPCON SPRING 96, FORTY-FIRST IEEE COMPUTER SOCIETY INTERNATIONAL CONFERENCE - INTELLECTUAL LEVERAGE, 1996, : 152 - 160