An integrated 8-12 GHz fractional-N frequency synthesizer in SiGe BiCMOS for satellite communications

被引：8

作者：

Herzel, Frank ^{[1
]}

Osmany, Sabbir A. ^{[1
]}

Hu, Kai ^{[1
]}

Schmalz, Klaus ^{[1
]}

Jagdhold, Ulrich ^{[1
]}

Scheytt, J. Christoph ^{[1
]}

Schrape, Oliver ^{[1
]}

Winkler, Wolfgang ^{[2
]}

Follmann, Ruediger ^{[3
]}

Koether, Dietmar ^{[3
]}

Kohl, Thorsten ^{[3
]}

Kersten, Olaf ^{[3
]}

Podrebersek, Thomas ^{[3
]}

Heyer, Heinz-Volker ^{[4
]}

Winkler, Frank ^{[5
]}

机构：

[1] IHP, D-15236 Frankfurt, Oder, Germany

[2] Silicon Radar GmbH, D-15236 Frankfurt, Oder, Germany

[3] IMST GmbH, D-47475 Kamp Lintfort, Germany

[4] Kayser Threde GmbH, D-81379 Munich, Germany

[5] Humboldt Univ, D-10117 Berlin, Germany

来源：

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING | 2010年 / 65卷 / 01期

关键词：

Phase-locked loop; Satellite communication; Phase noise; SiGe; BiCMOS; PVT tolerance; PHASE-NOISE; RF; TECHNOLOGY; CIRCUIT; VCO;

D O I：

10.1007/s10470-010-9454-z

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

We present an integrated fractional-N low-noise frequency synthesizer for satellite applications. By using two integrated VCOs and combining digital and analog tuning techniques, a PLL lock range from 8 to 12 GHz is achieved. Due to a small VCO line tuning gain and optimized charge pump output biasing, the phase noise is low and almost constant over the tuning range. All 16 sub-bands show a tuning range above 900 MHz each, allowing temperature compensation without sub-band switching. This makes the synthesizer robust against variations of the device parameters with process, supply voltage, temperature and aging. The measured phase noise is -87 dBc/Hz and -106 dBc/Hz at 10 kHz and 1 MHz offset, respectively. In integer-N mode, phase noise values down to -98 dBc/Hz at 10 kHz and -111 dBc/Hz at 1 MHz offset, respectively, were measured.

引用

页码：21 / 32

页数：12

共 38 条

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