A Design of Low Power 70GHz CMOS VCO for Wireless Communication system

被引：0

作者：

Lee, Jongsuk ^{[1
]}

Moon, Yong ^{[1
]}

机构：

[1] Soongsil Univ, Dept Elect Engn, 511 Sangdo Dong, Seoul, South Korea

来源：

2014 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2014年

关键词：

PLL(Phase Locked Loop); Wireless communication system; VCO(Voltage Controlled Oscillator); Center-tapped inductor; CMOS;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 70GHz Voltage Controlled Oscillatior (VCO) for wireless communication system is proposed by 0.11 mu m CMOS process. The VCO is designed by a center-tapped spiral inductor and NMOS cross-coupled structure and includes output buffer. The designed VCO oscillates from 69.95 to 71.62GHz and this frequency band is proper to wireless communication system in cars. The measured output power is -22.9dBm and phase noise is -78.67dBclHz at 1MHz offset at 71.18GHz. The power consumption of the VCO core is only 2.6mW at the supply voltage of 1.2V. VCO shows good figure of merit (FOM) of -171.57dBc/Hz.

引用

页数：2

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