Built-in self-test structure for fault detection of charge-pump phase-locked loop

被引:5
作者
Xia, Lanhua [1 ,2 ]
Wu, Jianhui [1 ,2 ]
Huang, Cheng [1 ]
Zhang, Meng [1 ]
机构
[1] Southeast Univ, Natl ASIC Syst Engn Res Ctr, Nanjing 210096, Jiangsu, Peoples R China
[2] Southeast Univ, Jiangsu Prov Key Lab Sensor Network Technol, Nanjing 210096, Jiangsu, Peoples R China
关键词
charge pump circuits; phase locked loops; built-in self test; phase detectors; flip-flops; charge pump phase locked loop; fault detection; defect-oriented built-in self-test structure; BIST structure; overhead test solution; phase detector; frequency detector; D flip-flop; stimulus generator; feature extracted devices; fault simulation; fault coverage; CIRCUIT;
D O I
10.1049/iet-cds.2015.0224
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A defect-oriented built-in self-test (BIST) structure of charge-pump phase-locked loop (CP-PLL) for high fault coverage and low area overhead test solution is proposed. It employs a new structure of phase/frequency detector, a D flip-flop and some existing blocks in the PLL as the input stimulus generator and fault feature extracted devices for testing evaluation. Thus, no extra test stimulus or high-performance measured instruments are required for test. The structure is easily implemented and has a little influence on the performance of CP-PLL. Fault simulation results indicate that the proposed BIST structure has high fault coverage (98.75%) and low area overhead (0.78%).
引用
收藏
页码:317 / 321
页数:5
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