Settling time optimisation for two-stage CMOS amplifiers with current-buffer Miller compensation

被引：19
|
作者：
Pugliese, A. [1 ]
Amoroso, F. A. [1 ]
Cappuccino, G. [1 ]
Cocorullo, G. [1 ]
机构：
[1] Univ Calabria, Dept Elect Comp Sci & Syst, I-87036 Arcavacata Di Rende, Italy
来源：
ELECTRONICS LETTERS | 2007年 / 43卷 / 23期
关键词：
D O I：
10.1049/el:20072059
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A new settling-time-oriented design strategy for two-stage operational amplifiers with current-buffer Miller compensation is presented. The proposed approach allows the systematic optimisation of the amplifier time response to be performed, avoiding time-consuming trial-and-error design processes. A design example in 0.35 mu m CMOS technology is also reported. Circuital and statistical simulations demonstrate the effectiveness of the proposed approach.
引用
收藏
页码：1257 / 1258
页数：2
相关论文
共 50 条
  • [1] Settling time optimisation for two-stage CMOS amplifiers with current-buffer Miller compensation (vol 43, pg 1257, 2007)
    Pugliese, A.
    Amoroso, F. A.
    Cappuccino, G.
    Cocorullo, G.
    ELECTRONICS LETTERS, 2008, 44 (05) : 389 - 389
  • [2] SETTLING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPLIFIERS WITH CURRENT-BUFFER MILLER COMPENSATION
    Pugliese, Andrea
    Amoroso, Francesco
    Cappuccino, Gregorio
    Cocorullo, Giuseppe
    REVUE ROUMAINE DES SCIENCES TECHNIQUES-SERIE ELECTROTECHNIQUE ET ENERGETIQUE, 2009, 54 (04): : 375 - 384
  • [3] Settling-time-oriented design procedure for two-stage amplifiers with current-buffer Miller compensation
    Pugliese, A.
    Amoroso, F. A.
    Cappuccino, G.
    Cocorullo, G.
    ECCSC 08: 4TH EUROPEAN CONFERENCE ON CIRCUITS AND SYSTEMS FOR COMMUNICATIONS, 2008, : 114 - +
  • [4] Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation
    A. Pugliese
    F. A. Amoroso
    G. Cappuccino
    G. Cocorullo
    Analog Integrated Circuits and Signal Processing, 2009, 59 : 151 - 159
  • [5] Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation
    Pugliese, A.
    Amoroso, F. A.
    Cappuccino, G.
    Cocorullo, G.
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2009, 59 (02) : 151 - 159
  • [6] Large-Signal Settling Optimization of SC Circuits Using Two-Stage Amplifiers with Current-Buffer Miller Compensation
    Amoroso, F. A.
    Pugliese, A.
    Cappuccino, G.
    PRIME: PROCEEDINGS OF THE CONFERENCE 2009 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, 2009, : 328 - 331
  • [7] Micropower Two-Stage Amplifier Employing Recycling Current-Buffer Miller Compensation
    Wang, Wei
    Yan, Zushu
    Mak, Pui-In
    Law, Man-Kay
    Martins, Rui P.
    2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2014, : 1889 - 1892
  • [8] Slewing investigation and improved design rules for SC circuits employing two-stage amplifiers with current-buffer Miller compensation
    Amoroso, F. A.
    Pugliese, A.
    Cappuccino, G.
    Cocorullo, G.
    PRIME: 2008 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, PROCEEDINGS, 2008, : 209 - 212
  • [9] The noise performance of CMOS Miller operational transconductance amplifiers with embedded current-buffer frequency compensation
    Grasso, Alfio Dario
    Palumbo, Gaetano
    Pennisi, Salvatore
    Sansen, Willy
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2017, 45 (04) : 457 - 465
  • [10] Eliminating complex conjugate poles in two-stage operational amplifiers with current buffer Miller compensation
    Oleksiy Zabroda
    Boris Murmann
    Analog Integrated Circuits and Signal Processing, 2014, 81 : 361 - 365
12345