Static hazard elimination for a logical circuit using quantum dot cellular automata

被引:6
|
作者
Khan, Angshuman [1 ]
Chakrabarty, Ratna [2 ]
De, Debashis [3 ]
机构
[1] Univ Engn & Management, Dept Elect & Commun Engn, Jaipur, Rajasthan, India
[2] Inst Engn & Management, Dept Elect & Commun Engn, Kolkata, India
[3] West Bengal Univ Technol, Dept Comp Sci & Engn, Kolkata, India
关键词
Clock Signal; Digital Circuit; Static Hazard; Majority Gate; Asynchronous Circuit;
D O I
10.1007/s00542-016-3057-2
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Quantum dot cellular automata (QCA) is an upcoming nano-technology for its high speed and low power operation in the field of nano-science and nano-electronics. As QCA overcomes the drawbacks of CMOS technology, it has appreciable applications in quantum computation. There are thousands of designs of different logical circuits using QCA but there is no hazard free design of the logical circuits in the field of QCA. In a circuit, hazards always produce an unpredictable output which can be avoided. In this paper, both hazardous and hazard-free asynchronous sequential circuits are considered and compared in terms of kink energy. It is shown that hazard free asynchronous circuit performs better in terms of kink energy in the field of QCA.
引用
收藏
页码:4169 / 4177
页数:9
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