Ultra-thin chip technology and applications, a new paradigm in silicon technology

被引：67

作者：

Burghartz, Joachim N. ^{[1
]}

Appel, Wolfgang ^{[1
]}

Harendt, Christine ^{[1
]}

Rempp, Horst ^{[1
]}

Richter, Harald ^{[1
]}

Zimmermann, Martin ^{[1
]}

机构：

[1] Inst Mikroelekt Stuttgart IMS CHIPS, Stuttgart, Germany

来源：

SOLID-STATE ELECTRONICS | 2010年 / 54卷 / 09期

关键词：

Thin silicon chip fabrication; Porous silicon; Buried cavity formation; Thin chip singulation; Flexible electronics; 3D chip stacking; GLOBAL INTERCONNECT DESIGN; CIRCUITS;

D O I：

10.1016/j.sse.2010.04.042

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Ultra-thin chip technology has potential to provide solutions for overcoming bottlenecks in silicon technology and for leading to new applications. This, however, requires new techniques in fabricating very thin wafers or chips, in applying them to device integration processes and in assembly and packaging. Therefore, ultra-thin chips and the related applications represent a new paradigm in silicon technology. The paper highlights the prominent applications of ultra-thin chips, alerts to the related technological issues and compares the candidate enabling technologies. (c) 2010 Elsevier Ltd. All rights reserved.

引用

页码：818 / 829

页数：12

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