Three Chips Stacking with Low Volume Solder Using Single Re-Flow Process

被引：7

作者：

Khan, Navas ^{[1
]}

Wee, David Ho Soon ^{[1
]}

Chiew, Ong Siong ^{[1
]}

Sharmani, Cheryl ^{[1
]}

Lim, Li Shiah ^{[1
]}

Li, Hong Yu ^{[1
]}

Vasarala, Shekar ^{[1
]}

机构：

[1] ASTAR, Inst Microelect, Singapore 117685, Singapore

来源：

2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC) | 2010年

关键词：

D O I：

10.1109/ECTC.2010.5490686

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Miniaturized 3D package with shorter distances between chips are needed for the mobile and high frequency applications. Chip-to-chip stacking for 3D packaging using conventional assembly method and single step reflow attachment is the most cost-effective. But fine pitch micro-joints of stacked chip by single re-flow attachment is challenging due to chip movement during stacking processes, which lead to poor assembly yields. This paper reports a method of stacking chips by thermal tacking and permanent joints are formed simultaneously by single re-flow step. Three chips of 12mm x 12mm size with micro bumps at 100um pitch have been assembled using this approach. Low volume of lead free solder (Sn) has been chosen for the micro-bump interconnections between the chips. The thermal tacking conditions and flip-chip assembly process have been studied in details. The micro-joints quality and reliability have been assessed and reported.

引用

页码：884 / 888

页数：5