Time-Memory Trade-Offs for Side-Channel Resistant Implementations of Block Ciphers

被引:2
作者
Vadnala, Praveen Kumar [1 ]
机构
[1] Riscure, Delft, Netherlands
来源
TOPICS IN CRYPTOLOGY - CT-RSA 2017 | 2017年 / 10159卷
关键词
Side-channel attacks; Masking; S-box compression; Time-memory trade-off; AES-128; PROVABLY SECURE; ATTACKS; MASKING;
D O I
10.1007/978-3-319-52153-4_7
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Currently, the most efficient first-order masked implementations use the classical randomized table countermeasure, which induces a penalty factor of around 2-3 in execution time compared to an unmasked implementation. However, an S-box with n-bit input and m-bit output requires 2(n)m bit memory; for example, AES requires 256 bytes of RAM. Conversely, generic S-box computation method due to Rivain-Prouff requires almost no memory, but the penalty factor to achieve first-order resistance is roughly 30-35. Therefore, we suggest studying time-memory trade-offs for block-cipher implementations based on an adaptation of a table compression technique proposed by IBM. We use the similar approach to study time-memory trade-offs for second-order masked implementations as well. We show that for the case of AES, reasonably efficient implementations can be obtained with just 40 bytes of RAM in both the cases and hence they can be used in highly memory constrained devices.
引用
收藏
页码:115 / 130
页数:16
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