FACSE: a framework for architecture and compilation space exploration

被引：0

作者：

Niar, Smail ^{[1
]}

Inglart, Nicolas ^{[1
]}

Chaker, Mahdi ^{[2
]}

Hanafi, Said ^{[1
]}

Benameur, Nasser ^{[1
]}

机构：

[1] Univ Valenciennes, F-59313 Valenciennes 9, France

[2] Eco Natl Ingn, Sfax, Tunisia

来源：

2007 INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA | 2007年

关键词：

architecture; processors; simulation; optimization; exploration;

D O I：

10.1109/DTIS.2007.4449531

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

To exploit microelectronics progresses for next processor generations, it is crucial to design new tools allowing a better adequacy between architectures and applications. The Facse project, which we present in this paper, strives to achieve this objective. As the two aspects of the system (hardware and software) are taken into account simultaneously, it is possible to increase the performances significantly. Facse is based on the use of adapted heuristics to guide search towards the most promising architecture and compiler optimization configurations in one side and rapid evaluation methods of these configurations on the other side.

引用

页码：249 / +

页数：2