Range Mapping-A Fresh Approach to High Accuracy Mitchell-Based Logarithmic Conversion Circuit Design

A high accuracy Mitchell-based logarithmic conversion method for integrated circuit design is presented in this paper. A novel technique named range mapping is proposed to perform the conversion with a fresh approach that compresses the range of approximation to smaller than one-third of the range of the Mitchell fraction m. After mapping, the compressed range possesses three favorable properties. Specifically, the compressed range is smaller, and has smaller gradient variation and fewer Mitchell fractions. All the three properties facilitate accuracy improvement when a four-region piecewise linear approximation is subsequently developed and applied on the compressed range. With the proposed method, the maximum absolute error and maximum absolute error percentage are improved by 15% and 25%, respectively, when compared with the best existing results by Kim et al. and De Caro et al., respectively. The proposed design is implemented in STM 90-nm CMOS technology, and its performance evaluated and compared with the well-known Mitchell-based methods.