Selective Harmonic Elimination modulation for Medium Voltage Modular Multilevel Converter

被引:0
作者
Moranchel, M. [1 ]
Bueno, E. J. [1 ]
Rodriguez, F. J. [1 ]
Sanz, I. [1 ]
机构
[1] Alcala Univ, Dept Elect, Alcala De Henares, Spain
来源
2016 IEEE 7TH INTERNATIONAL SYMPOSIUM ON POWER ELECTRONICS FOR DISTRIBUTED GENERATION SYSTEMS (PEDG) | 2016年
关键词
Modular Multilevel Converter (MMC); Genetic Algorithms; Selective Harmonic Elimination (SHE); Field Programmable Gate Array (FPGA);
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
The use of medium voltage converter in applications of voltage and grid supporting is increasing. To improve the power quality from the point of view of total harmonic distortion, this paper proposes the use of a Modular Multilevel Converter (MMC) with Selective Harmonic Pulse-Width Modulation (SHE-PWM). SHE-PWM allows control the harmonics generated at the output while it provides reduced switching losses. The main drawback of this modulation technique is to solve the equation system required to obtain the switching angles that minimize the generated harmonics. This paper studies the SHE-PWM for a six-level MMC where fifteen harmonics are minimized. The switching angles required to minimize the harmonics are obtained using Genetic Algorithms. Simulation and experimental results are presented to verify the proposed scheme for the MMC.
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页数:6
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