Logic circuit design based on MOS-NDR devices and circuits fabricated by CMOS process

被引:0
作者
Gan, KJ
Liang, DS
Hsiao, CC
Wang, SY
Chiang, FC
Tsai, CS
Chen, YH
Kuo, SH
Chen, CP
机构
来源
Fifth International Workshop on System-on-Chip for Real-Time Applications, Proceedings | 2005年
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We propose a new MOS-NDR device that is composed of the metal-oxide-semiconductor field-effect-transistor (MOS) devices. This device could exhibit the negative differential resistance (NDR) characteristics in the current-voltage characteristics by suitably modulating the MOS parameters. We design a logic circuit which can operate the inverter, NOR, and NAND gates. The devices and circuits are fabricated by the standard 0.35 mu m CMOS process.
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页码:392 / 395
页数:4
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