Non-minimal routing strategy for application-specific networks-on-chips

被引:11
作者
Matsutani, H [1 ]
Koibuchi, M [1 ]
Yamada, Y [1 ]
Jouraku, A [1 ]
Amano, H [1 ]
机构
[1] Keio Univ, Dept Informat & Comp Sci, Kohoku Ku, Yokohama, Kanagawa 2238522, Japan
来源
2005 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING WORKSHOPS, PROCEEDINGS | 2005年
关键词
D O I
10.1109/ICPPW.2005.59
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
We propose a deterministic routing strategy called flee which introduces non-minimal paths in order to distribute traffic with a high degree of communication locality in Networks-on-Chips. In the recent design methodology, target system and its application of the Systems-on-a-Chip are designed in system level description language like System-C, and simulated in the early stage of design. The task distribution is statically decided in this stage, and the amount of traffic between nodes can be analyzed. According to the analysis, a path that transfers a large amount of total data is firstly assigned with a relaxed limitation, thus it is mostly minimal. On the other hand, paths for small amount of total data, are secondly established so as not to disturb previously established paths, thus they are sometimes non-minimal. Simulation results show that the flee routing strategy improves up to 28.6% of throughput against the dimension-order routing on typical stream processing application programs.
引用
收藏
页码:273 / 280
页数:8
相关论文
共 14 条
  • [1] ANJO K, 2004, P IEEE INT PAR DISTR, pA10
  • [2] *ARM LTD, 2001, MULT LAY AHB OV
  • [3] DALLY WJ, 1987, IEEE T COMPUT, V36, P547, DOI 10.1109/TC.1987.1676939
  • [4] Dally WJ, 2001, DES AUT CON, P684, DOI 10.1109/DAC.2001.935594
  • [5] GLASS CJ, 1992, ACM COMP AR, V20, P278, DOI 10.1145/146628.140384
  • [6] HAKRABORTY K, 2002, FAULT TOLERANCE RELI
  • [7] Ho WH, 2003, NINTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS, P377, DOI 10.1109/HPCA.2003.1183554
  • [8] Programmable stream processors
    Kapasi, UJ
    Rixner, S
    Dally, WJ
    Kailany, B
    Ahn, JH
    Mattson, P
    Owens, JD
    [J]. COMPUTER, 2003, 36 (08) : 54 - +
  • [9] Liang H, 2004, IEEE T VLSI SYST, V12, P711, DOI [10.1109/TVLSI.2004.830919, 10.1109/tvlsi.2004.830919]
  • [10] Marescaux T, 2002, LECT NOTES COMPUT SC, V2438, P795