A non-uniform silicon TFET design with dual-material source and compressed drain

被引:28
|
作者
Talukdar, Jagritee [1 ]
Mummaneni, Kavicharan [1 ]
机构
[1] NIT Silchar, Dept Elect & Commun Engn, Silchar, Assam, India
来源
APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING | 2020年 / 126卷 / 01期
关键词
Tunnel FET (TFET); Band to Band tunneling (BTBT); Trap charge; INTERFACE TRAPS; TUNNEL-FET; GATE; DEVICE; MODEL;
D O I
10.1007/s00339-019-3266-5
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Tunnel FET is the well-built candidate in the field of low-power ICs mainly because of its lower subthreshold swing (SS). But its ON current is relatively small and ambipolar current is high. The advantage of having a lower SS does not hold for higher gate voltages, which leads to higher average SS. In this paper, for the first time, a non-uniform channel with double-material source and compressed drain TFET structure is introduced. The simulation results show that the proposed structure has a minimum point SS of 9 mV/decade and an average SS of 22 mV/decade for a wide range of gate voltages. In addition, the ambipolar current, ON current, and OFF current are obtained to be 10(-14) A/mu m, 10(-5) A/mu m, and 10(-16) A/mu m, respectively, which lead to a remarkable value of the ON-OFF current ratio of about 10(11). The effects of trap charge at oxide/semiconductor interface for different trap charge distributions have been investigated. Finally, it is observed that as compared to uniform distribution traps, Gaussian distribution traps degrade the characteristics in terms of ON-OFF current ratio and SS.
引用
收藏
页数:9
相关论文
共 50 条
  • [1] A non-uniform silicon TFET design with dual-material source and compressed drain
    Jagritee Talukdar
    Kavicharan Mummaneni
    Applied Physics A, 2020, 126
  • [2] A Reliability Study of Non-uniform Si TFET with Dual Material Source: Impact of Interface Trap Charges and Temperature
    Talukdar, Jagritee
    Mummaneni, Kavicharan
    SILICON, 2022, 14 (09) : 4515 - 4521
  • [3] Design and Analysis of a Novel Asymmetric Source Dual-Material DG-TFET with Germanium Pocket
    Kaur, Arashpreet
    Saini, Gaurav
    SILICON, 2023, 15 (06) : 2889 - 2900
  • [4] Dual-Material Gate-Drain Overlapped DG-TFET Device for Low Leakage Current Design
    Kumar, Sunil
    Raj, Balwant
    Raj, Balwinder
    SILICON, 2021, 13 (05) : 1599 - 1607
  • [5] Analysis of non-uniform hetero-gate-dielectric dual-material control gate TFET for suppressing ambipolar nature and improving radio-frequency performance
    Xu, Hui-Fang
    Cui, Jian
    Sun, Wen
    Han, Xin-Feng
    CHINESE PHYSICS B, 2019, 28 (10)
  • [6] Analysis of ION and Ambipolar Current for Dual-Material Gate-Drain Overlapped DG-TFET
    Kumar, Sunil
    Raj, Balwinder
    JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS, 2016, 11 (03) : 323 - 333
  • [7] Design and Analysis of Non-uniform Body with Dual Material FET-Based Digital Inverter
    Talukdar, Jagritee
    Mummaneni, Kavicharan
    MICRO AND NANOELECTRONICS DEVICES, CIRCUITS AND SYSTEMS, 2023, 904 : 159 - 165
  • [8] Dual-material dual-oxide double-gate TFET for improvement in DC characteristics, analog/RF and linearity performance
    Kumar, Satyendra
    Singh, Km. Sucheta
    Nigam, Kaushal
    Tikkiwal, Vinay Anand
    Chandan, Bandi Venkata
    APPLIED PHYSICS A-MATERIALS SCIENCE & PROCESSING, 2019, 125 (05):
  • [9] Vertical Tunneling Based Dual-material Double-gate TFET
    Singh, Km Sucheta
    Kumar, Satyendra
    Nigam, Kaushal
    2021 IEEE INTERNATIONAL CONFERENCE ON COMPUTING, COMMUNICATION, AND INTELLIGENT SYSTEMS (ICCCIS), 2021, : 900 - 904
  • [10] Analytical modeling of asymmetric hetero-dielectric engineered dual-material DG-TFET
    Dash, Dinesh Kumar
    Saha, Priyanka
    Sarkar, Subir Kumar
    JOURNAL OF COMPUTATIONAL ELECTRONICS, 2018, 17 (01) : 181 - 191