PTPG: A Parallel Test Program Generator for Cache Coherence Verification

被引:0
作者
Wang, Liyi [1 ]
Zheng, Yan [1 ]
Li, DaiFeng [1 ]
机构
[1] Jiangnan Inst Comp Technol, Wuxi, Peoples R China
来源
2015 INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE AND ENGINEERING APPLICATIONS (CSEA 2015) | 2015年
关键词
Cache Coherence; Post-silicon; Random Testing; Verification; Validation;
D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
PTPG is a parallel test program generator that can be used for the cache coherence verification of the manycore systems. With their significant performance and energy advantages, emerging manycore processors have brought new challenges to the verification process. The latency of a memory access in manycore systems can be significantly higher than in a single-core processor machine, this complicates the interaction between cores, since data values in some of the local caches may differ from those in the main memory. To guarantee that all cores have a coherent view of each memory location and all data changes are propagated through the entire system, a variety of cache coherence protocols have been proposed. Even if protocols can be proven correct for a high-level abstract model by using Formal verification and Model-checking method, lack of thoroughness in this verification may result in escaped bugs causing unexpected software behavior. This paper describes a novel method for cache coherence verification for manycore systems. By taking advantage of certain properties of the Random Testing, PTPG can generate parallel test program that is random as well as self-checking. We sketch our verification approach and apply it to High-Level Design Validation of caches in manycore systems. We carry out detailed analysis on the performance overhead of our approach and hold promise to bring the benefits of random testing to cache coherence verification with very little degradation in performance.
引用
收藏
页码:208 / 213
页数:6
相关论文
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