A 15-W Triple-Mode Wireless Power Transmitting Unit With High System Efficiency Using Integrated Power Amplifier and DC-DC Converter

被引:11
|
作者
Jang, ByeongGi [1 ]
Hejazi, Arash [1 ]
Rad, Reza E. [1 ]
Qaragoez, Yasser Mohammadi [1 ]
Ali, Imran [1 ]
Pu, YoungGun [1 ]
Hwang, Keum Cheol [1 ]
Yang, Youngoo [1 ]
Lee, Kang-Yoon [1 ]
机构
[1] Sungkyunkwan Univ, Dept Elect & Comp Engn, Suwon 16419, South Korea
关键词
DC-DC power converters; Wireless communication; Standards; Power amplifiers; Receivers; Transmitters; Voltage control; MOSFET power amplifiers (PAs); power conversion; pulsewidth modulated power converters; wireless power transmitters; CIRCUIT; A4WP;
D O I
10.1109/TIE.2020.3026290
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this article, we present an integrated triple-mode wireless power transmitter unit (TWPTU) circuit supporting all three alliance for wireless power (A4WP), wireless power consortium (WPC), and power matters alliance (PMA) standards, simultaneously, for high-efficiency battery charging application. The triple-mode power amplifier (PA) utilizes the adaptive gate splitting technique and free-wheeling control to achieve high efficiency in triple modes. The programmable supply voltage from two high-efficiency dc-dc converters supplies the PA. The output power of the PA is measured by the proposed high accuracy current sensor and controlled through different communication protocols depending on their operating standards. The WPC/PMA modes are based on the amplitude-shifting-key and frequency-shifting-key modulations for the communication between the transmitter and the receiver, while in the A4WP mode, to control the output power of the PA, the bluetooth-low-energy (BLE) unit adjusts the supply voltage through the provided step-up dc-dc converter. A step-down dc-dc converter with pulse-skipping modulation reduces the power consumption of the TWPTU during charge waiting time. The demodulator for in-band communication of WPC/PMA and interintegrated circuit for BLE communication of A4WP is fully implemented. This chip is fabricated using a 180-nm bipolar-CMOS-DMOS (BCD) process with laterally diffused mosfet options and has a die size of 5 x 3.5 mm. The proposed architecture achieves the output power level of 25.8 W. The measurement results show the maximum system efficiencies of the TWPTU in WPC/PMA and A4WP modes are 88.5% and 84.3%, respectively.
引用
收藏
页码:9574 / 9585
页数:12
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