Area-Efficient FFT Processors for OFDM Systems

被引：0

作者：

Shin, Sung Kyung ^{[1
]}

Sunwoo, Myung Hoon ^{[1
]}

机构：

[1] Ajou Univ, Sch Elect & Comp Engn, San 5, Suwon 442749, South Korea

来源：

2014 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC) | 2014年

关键词：

FFT; OFDM; pipeline; mixed-radix;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper proposes an area-efficient 128-point fast Fourier transform (FFT) processor for OFDM systems. The modified decomposition method and complex constant multiplier can reduce the number of twiddle factor multipliers and its ROMs. Compared with the existing FFT processor, the proposed processor can reduce the number of multipliers by 30% and the size of ROM by 62% respectively, without increase of delay elements.

引用

页码：268 / 269

页数：2

共 5 条

[1] A High-Speed Low-Complexity Modified Radix-25 FFT Processor for High Rate WPAN Applications [J].

Cho, Taesang ;

Lee, Hanho .

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2013, 21 (01) :187-191

[2] Efficient pipeline FFT processors for WLAN MIMO-OFDM systems [J].

Sansaloni, T ;

Pérez-Pascual, A ;

Torres, V ;

Valls, J .

ELECTRONICS LETTERS, 2005, 41 (19) :1043-1044

[3]

Widhe T., 1997, P IEEE INT S CIRC SY, P9

[4] Design of Area- and Power-Efficient Pipeline FFT Processors for 8x8 MIMO-OFDM Systems [J].

Yoshizawa, Shingo ;

Miyanaga, Yoshikazu .

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2012, E95A (02) :550-558

[5]

Yuan F. L., 2008, P IEEE AS SOL STAT C, P309

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