Structural Optimization of Ground Vias for 3D ICs

被引:0
作者
Li, Chunquan [1 ]
Kuang, Xiaole [1 ]
机构
[1] Guilin Univ Elect Technol, Sch Mech & Elect Engn, Guilin 541004, Peoples R China
来源
MANUFACTURING PROCESS TECHNOLOGY, PTS 1-5 | 2011年 / 189-193卷
关键词
TSV; Ground Vias; Transmission Performance; Structural Optimization;
D O I
10.4028/www.scientific.net/AMR.189-193.1472
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Nowadays, IC manufacturing meet the challenges of physical limits, through silicon via(TSV) technology has increasingly become the focus of the microelectronics industry due to its shorter wiring route, better signal integrity, larger bandwidth, lower power consumption and smaller packaging size. In this paper, the transmission performance of TSV was analyzed and the impact of ground vias number, diameter and pitch with TSV on TSV transmission performance. A design of experiment (DOE) was established to investigate the impact of different ground vias parameter combinations on the transmission of TSV and the range analysis of the experiment results was executed. Based on the DOE, two regression equations were formed to estimate the electrical performances of TSV. From the two equations, the structure parameters were optimized, the S11 and S21 results of optimization parameter combination reduced 0.4dB and 0.15dB, respectively.
引用
收藏
页码:1472 / 1475
页数:4
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