Implementation of digital-to-analog converter through CP-based GaAs/GaSb nanowire GAA-TFET

Digital-to-analog converter (DAC) is the most critical circuit of any chip which limits system performance and consume much power. Therefore, the focus of this work is the DAC implementation using GaAs/GaSb-based charge plasma nanowire GAA-TFET which provide better ON current at reduced ambipolarity and hence, reduce power consumption. Also, the linearity of the proposed device is much better than Si TFET due to the absence of random dopant fluctuation and hence, improves DAC accuracy. The DAC implemented here is the R-2R and current steering architecture which is the first ever known work of a charge plasma-based hetero-material nanowire TFET. For the DAC implementation, Verilog A lookup table is created from the simulated results of this device from TCAD Silvaco and rest of the circuit simulation is carried out in Cadence. Finally, DAC performance metrics have been analyzed and found that efficiency of current steering has been drastically improved compared to R-2R architecture.