Low-Cost and High-Accuracy Design of Fast Recursive MDCT/MDST/IMDCT/IMDST Algorithms and Their Realization

被引:9
|
作者
Lai, Shin-Chi [1 ]
Yeh, Yi-Ping [1 ]
Tseng, Wen-Chieh [1 ]
Lei, Sheau-Fang [1 ]
机构
[1] Natl Cheng Kung Univ, Dept Elect Engn, Tainan 70101, Taiwan
关键词
Canonic signed digit (CSD); fixed-coefficient hardware accelerator; modified discrete cosine transform (MDCT); modified discrete sine transform (MDST); recursive structure; type IV of the discrete cosine transform (DCT-IV); DCT-IV/DST-IV; FAST COMPUTATIONAL STRUCTURES; EFFICIENT IMPLEMENTATION; MDCT; TRANSFORMS;
D O I
10.1109/TCSII.2011.2177702
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This brief presents a novel low-cost and high-accuracy design for recursive modified discrete cosine transform (MDCT), modified discrete sine transform (MDST), inverse MDCT (IMDCT), and inverse MDST (IMDST) algorithms. The proposed algorithm not only can simultaneously compute MDCT and MDST (or IMDCT and IMDST) coefficients by adopting a compact recursive structure but also can increase the peak signal-to-noise ratio (PSNR) value by selecting the optimal q factor. The PSNR is over 78 dB at least for 256- and 512-point window lengths. Compared with Nikolajevic and Fettweis's algorithm for complexity analysis, the results show that the proposed algorithm greatly reduces 50.21% of multiplications, 24.97% of additions, and 50% of computational cycles for 512-point MDCT and MDST. The FPGA implementation results show that the proposed design can support 7.92 sound-channel encoding and decoding for Dolby AC-3 at a sampling rate of 48 kHz while the clock rate is set to 97 MHz.
引用
收藏
页码:65 / 69
页数:5
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