Digital Filter for Real-Time Impulse Noise Suppression in Video Processing Using Dynamic Partial Reconfiguration Technique

被引：0

作者：

Rani, L. S. Usha ^{[1
]}

Jagajothi, G. ^{[1
]}

Selvan, P. Thiruvalar ^{[2
]}

机构：

[1] Periyar Maniammai Univ, Thanjavur, Tamil Nadu, India

[2] TRP Engn Coll, Tiruchirappalli, Tamil Nadu, India

来源：

2015 INTERNATIONAL CONFERENCE ON CONTROL COMMUNICATION & COMPUTING INDIA (ICCC) | 2015年

关键词：

Image noise; FPGA; partial reconfiguration; pipelined-parallel architecture; image performance measures;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper, the root-cause for the appearance of various noises in the image and video are described. A hardware implementation of the median filter using Dynamic Partial Reconfiguration (DPR) technique to restore grayscale and color image having salt & peppers and random-valued impulse noise is proposed. The performance of proposed pipelined-parallel DPR architecture is validated in terms of different quantitative metrics and the experimental results are analyzed.

引用

页码：433 / 436

页数：4

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