Evaluating network-on-chip for homogeneous embedded multiprocessors in FPGAs

被引:8
作者
Freitas, Henrique C. [1 ]
Colomb, Dalton M. [2 ,3 ]
Kastensmidt, Fernanda L. [2 ,3 ]
Navaux, Philippe O. A. [1 ]
机构
[1] Univ Fed Rio Grande do Sul, Parallel & Distributed Proc Grp, Porto Alegre, RS, Brazil
[2] Univ Fed Rio Grande do Sul, Microelect Grp, PGMICRO, Porto Alegre, RS, Brazil
[3] Univ Fed Rio Grande do Sul, Inst Informat, PPGC, Porto Alegre, RS, Brazil
来源
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | 2007年
关键词
D O I
10.1109/ISCAS.2007.378783
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip multiprocessor proposals were designed and compared for Xilinx FPGAs using McroBlaze processors: one based on NoC and the other based on shared memory/bus. One of the main findings is the communication performance evaluation of NoC for parallel computing applications. The comparison results show that an efficient implementation of NoC on FPGA can improve communication speed by up to seven times with low area overhead, according to the data size and the number of processors connected to the network.
引用
收藏
页码:3776 / +
页数:2
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