Study on failure mode of solder bump fabricated using eutectic solder electroplating process

被引：2

作者：

Xiao, GW ^{[1
]}

Chan, PCH ^{[1
]}

Teng, A ^{[1
]}

Cai, J ^{[1
]}

Yuen, MMF ^{[1
]}

机构：

[1] Hong Kong Univ Sci & Technol, Dept Elect & Elect Engn, Hong Kong, Hong Kong, Peoples R China

来源：

PROCEEDINGS OF INTERNATIONAL SYMPOSIUM ON ELECTRONIC MATERIALS AND PACKAGING | 2000年

关键词：

solder bump; flip-chip; intermetallic compound; electroplating; reliability; growth kinetics;

D O I：

10.1109/EMAP.2000.904129

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The electroplating-based flip chip process has many advantages over other solder bumping methods, while the bump fabrication process can affect the reliability of solder joints. In this paper, the effect of the UBM and electroplating process of solder bump on the shear strength of solder bump is studied as well as the relationship between the shear test failure mode and solder bump fabrication process. It is reported that the Cu surface roughness is affect by the Cu plating current density and the proper current density is from 10 similar to 40mA/cm(2). The temperature of solder bump plating process should be within 30 similar to 35 degreesC. It is observed that the growth kinetics of intermetallic compound formation is affected by the Cu stud structure. The ratios of Cu(3)Sn to the total Cu-Sn IMC layer thickness was from 0.5 to 0.15 with various Cu microstructures at 150 degreesC during thermal aging test. The activation energy was in the range of 0.78ev to 1.14ev. Five failure modes of shear test are analyzed which are related to the electroplating process.

引用

页码：18 / 26

页数：9

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