Implementation of Super-Resolution Algorithm on FPGA

被引:0
作者
Hurdale, Sharayu [1 ]
Khandekar, Prasad [1 ]
机构
[1] Vishwakarma Inst Informat Technol, Dept Elect & Tele Commun, Pune, Maharashtra, India
来源
2015 IEEE INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND COMPUTING RESEARCH (ICCIC) | 2015年
关键词
Super-resolution; FPGA (Field Programmable Gate Array); Higher resolution image;
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Super resolution technique gives an effective way to increase image resolution. Lower resolution is converted into higher resolution. By proposed super resolution algorithm, image is resolved sixteen times. This paper presents a FPGA (Field Programmable Gate Array) implementation of super resolution algorithm. FPGA is used because of its various advantages. In super resolution image size is increased by adopting information from input image itself. Using this algorithm image can be resolved up-to 2x, 4x, 8x and 16x.
引用
收藏
页码:301 / 303
页数:3
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