Electrical evaluation of the epi/substrate interface quality after different in-situ and ex-situ low-temperature pre-epi cleaning methods

The standard cleaning before epitaxial growth of Si, during which the native oxide is desorbed in a very high temperature bake step, has to be replaced by lower thermal budget oxide removal treatments when sensitive structures are present on the wafer. The most suitable way appears to be gas phase cleaning, i.e. etching in an HF/Vapour process. An important issue here is possibly remaining contamination at the epi-substrate interface, resulting in defects in the epi layer which in turn can deteriorate the electrical performance of devices. We compared three different HF/Vapour processes (with the vapour being water, methanol and acetic acid), and the standard HF dip. The HF/MeOH process could be applied in-situ and ex-situ, where in-situ means that the cleaning chamber is clustered to the epi reactor. These cleanings could be combined with low temperature bakes in the epi. We made specially designed diodes and measured their electrical characteristics. From this as well as from defect and SIMS measurements, it appears that all ex-situ cleans (including HF dip) need a low-T bake (700 degrees C), and that, if no bake is allowed, only an in-situ clean is able to pass the electrical tests.