共 13 条
- [1] A reconfigurable Design-for-Debug infrastructure for SoCs [J]. 43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006, 2006, : 7 - +
- [2] [Anonymous], J FPGA STRUCTURED AS
- [3] Boulé M, 2007, ISQED 2007: PROCEEDINGS OF THE EIGHTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, P613
- [4] EEN N, 2003, P 6 INT C THEOR APPL
- [5] Debug support for complex systems on-chip: a review [J]. IEE PROCEEDINGS-COMPUTERS AND DIGITAL TECHNIQUES, 2006, 153 (04): : 197 - 207
- [6] Visibility enhancement for silicon debug [J]. 43RD DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2006, 2006, : 13 - 18
- [7] *IEEE JTAG, 2001, 114912001 IEEE JTAG
- [8] Prime clauses for fast enumeration of satisfying assignments to boolean circuits [J]. 42nd Design Automation Conference, Proceedings 2005, 2005, : 750 - 753
- [9] SABHARWAL A, 2006, P 9 INT C THEOR APPL
- [10] VANROOTSELAAR, 1999, P IEEE INT TEST C, P892