共 50 条
- [21] Area-Efficient Multi-Moduli Squarers for RNS 13TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN: ARCHITECTURES, METHODS AND TOOLS, 2010, : 408 - 411
- [22] An Area-Efficient Multi-Rate Digital Decimator 2019 IEEE 13TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2019,
- [23] An Area-Efficient Rectifier with Threshold Voltage Cancellation for Intra-Body Power Transfer 2019 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2019,
- [24] A Low-Power Dynamic Comparator with Time-Domain Bulk-Driven Offset Cancellation 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012, : 2493 - 2496
- [25] Low Power, Low Offset, Area Efficient Comparator Design in Nanoscale CMOS Technology PROCEEDINGS OF 2018 IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS 2018), 2018,
- [26] Parameterized Area-Efficient Multi-standard Turbo Decoder DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 109 - 114
- [28] Design of Low Power, High Speed, Low Offset and Area Efficient Dynamic-Latch Comparator for SAR-ADC PROCEEDINGS OF 2020 INTERNATIONAL CONFERENCE ON INNOVATIVE TRENDS IN COMMUNICATION AND COMPUTER ENGINEERING (ITCE), 2020, : 299 - 302
- [29] A high-efficient dynamic comparator with low-offset in weak inversion region Analog Integrated Circuits and Signal Processing, 2022, 110 : 175 - 183