A single chip 802.11 a/b/g WLAN transceiver

被引:0
作者
Jonsson, F [1 ]
Ahola, R [1 ]
Aktas, A [1 ]
Wilson, J [1 ]
Rao, KR [1 ]
Hyyryläinen, I [1 ]
Brolin, A [1 ]
Hakala, T [1 ]
Friman, A [1 ]
Makiniemi, T [1 ]
Hanze, J [1 ]
Sanden, M [1 ]
Wallner, D [1 ]
Guo, YX [1 ]
Lagerstam, T [1 ]
Noguer, L [1 ]
Knuuttila, T [1 ]
Olofsson, P [1 ]
Ismail, M [1 ]
机构
[1] Spirea AB Stockholm, Stockholm, Sweden
来源
22ND NORCHIP CONFERENCE, PROCEEDINGS | 2004年
关键词
D O I
10.1109/NORCHP.2004.1423866
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A dual-band triple mode radio compliant with the IEEE 802.11 a/b/g standard implemented in a 0.18 pin CMOS process is presented. The transceiver is compatible with a large number of basebands due to its flexible interface towards AD / DA converters and on-chip automatic calibration of on-chip filters and oscillators. The transceiver achieves a receiver noise figure of 4.915.6dB for the 2.4GHz/5GHz bands, respectively, and a minimum transmit error vector magnitude (EVM) of 2.5% for both bands. A quadrature accuracy of 0.3 degrees in phase and 0.05dB in amplitude is achieved through careful analysis and design of the I/Q generation parts of the local oscillator, The local oscillators achieve a better than -34dBc total integrated phase noise. The chip passes +/- 2kV human body model ESD testing on all pins, including the RF pins. The total die area is 12mm(2). The power consumption is 207mW in the receive mode and 247mW in the transmit mode using a 1.8 V supply.
引用
收藏
页码:233 / 236
页数:4
相关论文
共 8 条
[1]   A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard [J].
Behzad, AR ;
Shi, ZM ;
Anand, SB ;
Lin, L ;
Carter, KA ;
Kappes, MS ;
Lin, TH ;
Nguyen, T ;
Yuan, D ;
Wu, S ;
Wong, YC ;
Fong, V ;
Rofougaran, A .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (12) :2209-2220
[2]  
*IEEE, IEEE WIR LAN STAND
[3]   5-GHz and 2.4-GHz dual-band RF-transceiver for WLAN 802.11 a/b/g applications [J].
Klepser, BU ;
Punzenberger, M ;
Rühlicke, T ;
Zannoth, M .
2003 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS, 2003, :37-40
[4]   A CMOS dual-band tri-mode chipset for IEEE 802.11a/b/g wireless LAN [J].
Mehta, S ;
Zargari, M ;
Jen, S ;
Kaczynski, B ;
Lee, M ;
Mack, M ;
Mendis, S ;
Onodera, K ;
Samavati, H ;
Si, W ;
Singh, K ;
Terrovitis, M ;
Weber, D ;
Su, D .
2003 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS, 2003, :427-430
[5]  
STROET P, 2001, IEEE INT SOL STAT CI, P204
[6]  
SU D, 2002, IEEE INT SOL STAT CI, P92
[7]   A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN [J].
Vassiliou, I ;
Vavelidis, K ;
Georgantas, T ;
Plevridis, S ;
Haralabidis, N ;
Kamoulakos, G ;
Kapnistis, C ;
Kavadias, S ;
Kokolakis, Y ;
Merakos, P ;
Rudell, JC ;
Yamanaka, A ;
Bouras, S ;
Bouras, I .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (12) :2221-2231
[8]   A 5-GHz direct-conversion CMOS transceiver [J].
Zhang, PF ;
Nguyen, T ;
Lam, C ;
Gambetta, D ;
Soorapanth, T ;
Cheng, BH ;
Hart, S ;
Sever, I ;
Bourdi, T ;
Tham, A ;
Razavi, B .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (12) :2232-2238