High-Performance RF-Interconnect for 3D Stacked Memory

被引：0

作者：

Alzahmi, Ahmed ^{[1
]}

Mirzaie, Nahid ^{[1
]}

Lin, Chung-Ching ^{[1
]}

Kim, Insoo ^{[2
]}

Byun, Gyung-Su ^{[3
]}

机构：

[1] Southern Methodist Univ, Dept Elect Engn, Dallas, TX 75205 USA

[2] Univ Connecticut, Dept Med, Farmington, CT 06032 USA

[3] Inha Univ, Dept Informat & Commun, Incheon, South Korea

来源：

PROCEEDINGS INTERNATIONAL SOC DESIGN CONFERENCE 2017 (ISOCC 2017) | 2017年

关键词：

RF Transceiver; high bandwidth memory (HBM); optimization; through-silicon-via (TSV); 3D ICs;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A high-performance 3D RF transceiver with improved through-silicon via (TSV) geometry and matching for future 3D stacked memory has been introduced. It utilizes optimization method to achieve impedance matching and maximize signal integrity. TSV is accurately modeled using 3D EM solver tool (HFSS) with the matching network to generate S-parameter accurately. The proposed transceiver scheme is simulated in 65nm CMOS technology at 1V. The results show that the whole structure consumes 11.32mW and accomplishes data rate of 4Gb/s/pin.

引用

页码：109 / 110

页数：2

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