Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip

被引：121

作者：

Millberg, M ^{[1
]}

Nilsson, E ^{[1
]}

Thid, R ^{[1
]}

Jantsch, A ^{[1
]}

机构：

[1] Royal Inst Technol, IMIT, LECS, S-16440 Kista, Sweden

来源：

DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS | 2004年

关键词：

D O I：

10.1109/DATE.2004.1269001

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In today's emerging Network-on-Chips, there is a need for different traffic classes with different Quality-of-Service guarantees. Within our NoC architecture Nostrum, we have implemented a service of Guaranteed Bandwidth (GB), and latency, in addition to the already existing service of Best-Effort (BE) packet delivery. The guaranteed bandwidth is accessed via Virtual Circuits (VC). The VCs are implemented using a combination of two concepts that we call 'Looped Containers' and 'Temporally Disjoint Networks'. The Looped Containers are used to guarantee access to the network-independently of the current network load without dropping packets; and the TDNs are used in order to achieve several Vcs, plus ordinary BE traffic, in the network. The TDNs are a consequence of the deflective routing policy used, and gives rise to an explicit time-division-multiplexing within the network. To prove our concept an HDL implementation has been synthesised and simulated. The cost in terms of additional hardware needed, as well as additional bandwidth is very low-less than 2 percent in both cases! Simulations showed that ordinary BE traffic is practically unaffected by the vCs.

引用

页码：890 / 895

页数：6

共 14 条

[1] Networks on chips: A new SoC paradigm [J].

Benini, L ;

De Micheli, G .

COMPUTER, 2002, 35 (01) :70-+

[2]

Culler DavidE., 1999, PARALLEL COMPUTER AR

[3]

Dally W. J., 2001, P DAC 2001 JUN

[4]

Feige U., 1992, Proceedings 33rd Annual Symposium on Foundations of Computer Science (Cat. No.92CH3188-0), P553, DOI 10.1109/SFCS.1992.267796

[5]

GOOSSENS K, 2002, DATE 2002 MARCH

[6]

GUERRIER P, 2000, P DATE 2000 MARCH

[7]

Kumar S., 2002, P IEEE COMP SOC APR

[8] FAT-TREES - UNIVERSAL NETWORKS FOR HARDWARE-EFFICIENT SUPERCOMPUTING [J].

LEISERSON, CE .

IEEE TRANSACTIONS ON COMPUTERS, 1985, 34 (10) :892-901

[9]

MILLBERG M, 2004, P VLSI DES IND JAN

[10]

MILLBERG M, 2003, 0201 TRITA IMIT LECS

← 1 2 →